As a technology for a thermal design of a power semiconductor device for a radio-frequency transmitter and receiver module mounted in a personal digital assistant such as a cellular phone, a packaging structure for reducing its thermal resistance is disclosed in Japanese Patent Application Laid-Open Publication No. 2001-102483 (Patent Document 1) and Japanese Patent Application Laid-Open Publication No. 2003-282631 (Patent Document 2). In the packaging structure disclosed in the Patent Document 1, a face-up packaging in which a circuit forming area (active area) of a semiconductor element 7 is located on an upper surface of the element is employed as shown in the cross-sectional view of FIG. 1. Further, a thermal conductive material being a connecting member is used between a lower portion of the element and a multilayer circuit board 1, and the thermal conductive material functions as a so-called heat spreader 5. Note that, in FIG. 1, a reference numeral 2 denotes molding resin, 3 denotes a bonding wire, 4 denotes a joint member, 6 denotes a joint member, and 8 denotes a thermal via.
On the other hand, in the packaging structure disclosed in the Patent Document 2, a semiconductor element 7 is placed on a multilayer circuit board 1 in a face-down manner, that is, by a flip chip connection method where an active area is faced to a lower surface side of the element as shown in the cross-sectional view of FIG. 2. In this case, by using a large-area bump structure for use only for the heat radiation, the heat is efficiently radiated to the circuit board. Note that, in FIG. 2, a reference numeral 9 denotes an electrical connection electrode, 10 denotes a electrical connection bump, 11 denotes an insulating layer, 12 denotes a heat radiation electrode, and 13 denotes a heat radiation bump.
Also, an example of a structure for improving the radiation performance of a flip-chip-connected semiconductor element is disclosed in Japanese Patent Application Laid-Open Publication No. 6-260532 (Patent Document 3).